Using DE Line for HSYNCing

today i taught i give it a try to use the DE Line for HSYNCing

DE – stands for Datavalid and it is basically a controll line which is
high whenever there is valid pixel data.

I modified the Board and removed the connection from ADV7611_HSYNC to
CSI1_HSYNC and made a new connection by connecting ADV7611_DE to CSI1_HSYNC.

Actually I don’t use direct connections but 33 Ohm Series resistors –
but if you don’t have those resistors lying around you can use straight
wires I guess (as long as you dont make shorts)

and yes it worked …

I am not sure what went wrong in first place but this is a sollution we
can continue working …
As modifying the HOR_START Register from the CSI1 Perihperal didn’t show
any difference, i suspect that there is something strange with CSI1 –
maybe there is a BUG in Silicon of the CSI1 Peripheral.

But there is probably more to this issue – maybe the
registers are not set correctly.

Attached see a Grayscale sample (for some reason the v4l2-capture tool
makes sometimes problems) – captured via gstreamer-1.2.4

test1(UPDATE) if you zoom in the following picture you can see a one Pixel wide frame – that shows that really every pixel of the 1280×720 input is captured


and here is the mod of the board:



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